Electronics Engineering Intern with Expertise in Analog and RF Circuit
Aarav Menon
Professional Summary
Electronics Engineering undergraduate specializing in analog and RF circuit design with hands-on experience in 6G communication systems and CMOS-based delay-locked loops. Proficient in Cadence Virtuoso, CST Studio, and Verilog-A, with a strong foundation in simulation and hardware prototyping. Proven ability to optimize circuit performance and power efficiency through research internships at premier institutes.
Work Experience
Research Intern at Indian Institute of Technology Kanpurpur
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• Designed dual-input groove gap waveguide for D-band (110–170 GHz) and V-band (50–75 GHz) 6G communication systems using CST Studio Suite. • Developed waveguide structure with pin arrays creating a stopband for quasi-TE modes. • Optimized periodicity, pin height, and gap width for tailored frequency response. • Fabricated structure via MultiJet Printing (MJP), enabling cost-effective prototyping.
Research Intern at Indian Institute of Technology Narayanpur
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• Designed delay-locked loop (DLL) for clock synchronization using Verilog-A and 180 nm CMOS. • Modeled binary-weighted current-starved delay line with D flip-flop and 4-bit up-down counter. • Achieved 1.5 µs locking time, 5.5% static phase offset, and 56.6 µW power consumption.
Education
Bachelor of Technology in Electronics and Instrumentation Engineering
NIT Bhavnipur
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GPA: 8.23 / 10
Skills
Technical Skills
- Cadence Virtuoso
- LTspice
- CST Studio
- MATLAB
- Python
- C
- Verilog-A
Soft Skills
- Analytical problem solving
- Team collaboration
- Attention to detail
- Adaptability
Certifications
Analog Design
Texas Instruments
Electronic System Design: Hands-On Circuit and PCB Design with CAD Software
NPTEL